Senior SOC Logic Design Engineer
Responsible for Integration of Third party IPs -- Synthesis, functional and/or timing convergence, and pre and post-si debug of IPs developed by various external vendors as well as within the company. Handling of signals crossing power planes and clock domains, industry standard protocols including hardware and software details dealing with Memory (LPDDR), storage (eMMC, SATA, UFS), peripherals (PCIe, USB), and MIPI interfaces in SOC devices. System integration dealing with Si/ Platform/ FW/ MW/ drivers/ OS/ Apps on Android & Windows-based tablets and phones. Need to identify and vet the...
18-02-2015 - arca24.com